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TS_Process_V1.0
- DVB 加扰软件，对TS流文件进行加扰，符合DVB标准-it s a dvb scramble software . it can scrambling ts stream file ,which apply for dvb standards
MAC_4_CSA
- MAC-4bit verilog source code with CSA style
csa
- This common interview question ask about verilog-This is common interview question ask about verilog
csa_verilog_rtl
- CSA加扰算法verilog实现，代码经过fpga验证，可以正确实现该算法。-CSA verilog rtl codeing
csaaa
- csa 16 bit verilog code with less delay
CSA.tar
- A Carry Select Adder.